RISC-V Day Vietnam 2022 | RISC-V 協会

Co-Sponsoring and Contributing Organizations
Vietnam National University Information Technology Institute (VNU ITI)
Indian Institute of Technology – Madras, Pravartak Technologies Foundation
University or Electro-Communications, Integrated Circuit Design Laboratory

RISC-V Day Online Vietnam 2022 Program Schedule

January 15, 2022 (Sat.) 9:00 – 17:00 ICT (Indochina Time, GMT+7)

Schedule is in Indochina Time (ICT, GMT+7)
Please note that the speakers and contents are tentative and subject to change,
and the schedule may change on the day of the event due to various reasons.

Time	Lang	Presentation Title	Speaker (*) \| Affiliation	Media
9:00-9:10	E	Program Guide from Master of Ceremony #rvdv_00	Shumpei Kawasaki \| RISC-V Alliance Japan
9:10-9:30	E	Why is it Important for Vietnam to Engage in RISC-V? #rvdv_01	Calista Redmond \| CEO RISC-V International (Switzerland)	PDF Video
9:30-10:10	E	ADEN4IoT – a RISC-V based system-on-chip platform for Internet-of-Thing application #rvdv_02	(*)Xuan-Tu Tran \| Information Technology Institute, Vietnam National University Hanoi, Associate Professor (Vietnam) Duy-Hieu Bui \| Information Technology Institute, Vietnam National University Hanoi, Assistant Professor (Vietnam)	PDF Video
10:10-10:50	E	Deep Learning Based Side Channel Attack for AES Software Implementation of RISC-V Microcontroller #rvdv_03	(*) Ngoc-Tuan Do \| Institute of System Integration (ISI), LQDTU (Vietnam) , Van-Phuc Hoang \| Institute of System Integration (ISI), LQDTU (Vietnam)	PDF Video
10:50-11:00	–	Coffee Break
11:00-11:40	E	A Tiny Neuron Network System based on RISC-V Processor #rvdv_04	(*) Ngo-Doanh Nguyen \| Information Technology Institute, Vietnam National University Hanoi, Research Engineer Duy-Hieu Bui \| Information Technology Institute, Vietnam National University Hanoi, Assistant Professor (Vietnam)	PDF Video
11:40-12:20	V E	Root of Trust Chip Integration and Over-the-Air Software Upgrade for RISC-V FreeRTOS IoT #rvdv_05	Hoan Huynh Vu \| SHCVN, Engineer (Vietnam), Shumpei Kawasaki \| SH Consulting Group (Japan)	PDF Video
12:20-13:00	–	Lunch
13:00-13:40	E	Implementation of 32-bit and 64-bit RISC-V on Hardware #rvdv_06	Duc-Hung Le \| The University of Science – VNUHCM (Vietnam)	PDF Video
13:40-14:20	E	Cache side-channel Attack on RISC-V processor #rvdv_07	(*) Anh-Tien Le \| (PhD Student VLSILAB) University of Electro-Communications, Cong-Kha Pham \| Professor, University of Electro-Communications (Japan)	PDF Video
14:20-14:50	E	Growing IC design Industry in Vietnam and Boosting up VN Community Activities #rvdv_08	Nguyen Thanh Yen \| CoAsia SEMI Vietnam, Principal engineer, Head of Engineering, Administrative group member of Vietnamese Semiconductor engineers community (Vietnam)	PDF Video
14:50-15:30	E	RISCV Journey in India #rvdv_09	Veezhinathan Kamakoti \| The Indian Institute of Technology – Madras（India)	Video
15:30-16:00	E	RISC-V Technological Initiatives within Renesas Electronics Corporation #rvdv_10	Kimiharu Eto \| Head of Musashi Site, Vice president, MCU product Development Division, IOT and Infrastructure Business Unit, Renesas Electronics Corporation (Japan)	PDF Video
16:00-16:30	E	Side-Channel Leakage Evaluation of a RISC V Processor #rvdv_11	‍Dr. Chester Rebeiro \| Associate Professor, Indian Institute of Technology Madras (India)	PDF Video
16:30-16:50	E	Current Status and Prospects of RISC-V Research and Development in Japan #rvdv_12	Shumpei Kawasaki \| RISC-V Alliance Japan (Japan)	PDF Video
16:50-17:00	E	Closing Remarks #rvdv_13	Xuan-Tu Tran \| The Information Technology Institute, Vietnam National University, Hanoi (Vietnam)