DTS INSIGHT CORPORATION has been started as a member of DTS group, merging with Yokogawa Digital Computer Corporation and ART System Co., Ltd. and embedded related business of DTS CORPORATION on April 1th, 2017.
Our major business are,
– System development product in automotive/embedded field
– Hardware/Firmware development
– Measurement control system in healthcare field
– Commissioned development in various fields, etc.
DTS INSIGHT have supported customer’s business as above in each company’s strong field, and will achieve services for the world of IoT continued to evolve further in the future.
Kiyoshi Niwa joined Toshiba Corporation in 1982, and developed Logic LSI (ASIC) design technology. Joined VLSI Technology KK in 1990, as ASIC Design Engineer. Joined Nihon Synopsys KK in 1994, as FAE for Synthesis, DFT and Fault analysis etc. Joined ARM KK in 2002, as FAE and Technical Support for CPU Core and Peripheral IP. Joined DTS Insight Corporation in 2020, and is an FAE of agency activity for SiFive, now.
Keio University Faculty of Science and Technology Department of Information Engineering: Keio University Amano Lab researches new computer architecture in Post-Moore Age. As semiconductor scalings are stopping, it’s time to create new computers with special purpose, reduced power, and dynamic structure. His team is not only conducting simulation but also creating actual LSI chip and board, system construction and verification.
Prof. Hideharu Amano received his Ph.D. in 1986 from Keio University. He was a visiting assistant professor at Stanford University from 1989-1990. Now, he is a professor at the Department of Information and Computer Science, Keio University. Hideharu Amano started research on computer architecture under the professor Hideo Aiso, Department of Electrical Engineering, and shared memory, cache, switch chip, multiprocessor, reconfigurable system, massively parallel system, router chip, multi-context device, power saving Reconfigurable accelerator, ultra-low power processor, consistent architecture research. It is known for its approach to developing and evaluating real systems to demonstrate ideas. In addition to translating Hennessy Patterson’s “quantitative approach”, he has held numerous academic committee positions and positions.
SiFive is the leading provider of market-ready processor core IP and silicon solutions based on the free and open RISC-V instruction set architecture. Led by a team of seasoned silicon executives and the RISC-V inventors, SiFive helps SoC designers reduce time-to-market and realize cost savings with customized, open-architecture processor cores, and democratizes access to optimized silicon by enabling system designers in all market verticals to build customized RISC-V based semiconductors. With 15 offices worldwide, SiFive has backing from Sutter Hill Ventures, Qualcomm Ventures, Spark Capital, Osage University Partners, Chengwei, Huami, SK Hynix, Intel Capital, and Western Digital.
Atsushi Ishii has over 10+ year experience as President of Axis Japan Co.Ltd., Verisity Design K.K. & Carbon Design Systems Japan K.K. He is currently the representative in Japan of SiFive,Inc..
DTS INSIGHT CORPORATION has been started as a member of DTS group, merging with Yokogawa Digital Computer Corporation and ART System Co., Ltd. and embedded related business of DTS CORPORATION on April 1th, 2017.
Our major business are,
– System development product in automotive/embedded field
– Hardware/Firmware development
– Measurement control system in healthcare field
– Commissioned development in various fields, etc.
DTS INSIGHT have supported customer’s business as above in each company’s strong field, and will achieve services for the world of IoT continued to evolve further in the future.
Yoshihito Kondo has been working for Sony Corporation since 1990 and has been involved in the development of media processor. Engaged in CMOS image sensor development at Sony LSI Design Inc. from 2012. Joined DTS Insight Co., Ltd. in 2019 and is currently in charge of agency operations for SiFive.
ArchiTek Corporation is a start-up company that develops AI / image processing / audio processing LSI. We are advocating an LSI architecture that can be flexibly defined by software, and working on LSI development that realizes high performance, low cost, and low power consumption, also providing advanced software and solutions.
Goki Kuroda | ArchiTek Corporation | CMO (Japan).
Joined Matsushita Electric Industrial Co., Ltd. (currently Panasonic) in 1989.
Engaged in reseach and development of computer architecture, ultra-compact mounting technology, etc. at the Information Systems Laboratory.
After that, planned and promoted company-wide open innovation.
Currently in charge of marketing at ArchiTek Corporation.Goki Kuroda : Joined Matsushita Electric Industrial Co., Ltd. (currently Panasonic) in 1989.
Engaged in reseach and development of computer architecture, ultra-compact mounting technology, etc. at the Information Systems Laboratory.
After that, planned and promoted company-wide open innovation.
Currently in charge of marketing at ArchiTek Corporation.
Esperanto Technologies: Esperanto Technologies develops high-performance, energy-efficient computing solutions for Artificial Intelligence / Machine Learning based on the open standard RISC-V instruction set architecture. For more information, please visit https://www.esperanto.ai/
Eiji Kasahara Eiji is a Sr. CPU Architect for Esperanto‘s SOC(Supercomputer on Chip). His recent RISC-V association’s achievements include Organizer and Program Committee, the planning of RISC-V related translation books, and 2017 and 2018 speaker. Eiji is also famous for his role as an architect of PlayStation3’s Cell Broadband Engine (CELL/BE). Eiji was responsible for development of CELL/B.E design, power-performance, semiconductor process technologies in 90nm, 65nm, and 45nm generation SOI process technologies to reduce cost and power as Deputy of STI(Sony-Toshiba-IBM) Design Center in Austin, Texas. Before joining Sony Corporation, Eiji developed NEC SX-5 supercomputer and NEC ACOS4 mainframe computers in Japan.
Technology Research Association of Secure IoT Edge application based on RISC-V Open architecture (TRASIO) : Research and Development on Secure Open Architecture Basic Technology and Application to AI Edge. TRASIO is a technology research association (corporation) under the Ministry of Economy, Trade and Industry, which was established in FY2019 for the purpose of conducting research and development of NEDO’s consignment business. Currently, the union members are three companies, one national research institute, and one university.
Daisuke Ito graduated from Kanazawa Institute of Technology, Department of Electrical and Electronic. He joined SECOM Co., Ltd. in 1993 and was engaged in the establishment of Internet service providers and data centers. He founded ROBOC Corporation in 2004. He is engaged in the development of security technology related to IC cards. In 2020 he joined TRASIO.
SH Consulting Group (Software Hardware Consulting Group) is a company that supports RISC-V software development and hardware development. We are developing AWS FreeRTOS WiFi client using RISC-V, AI software framework on RISC-V Linux, etc.
Shumpei Kawasaki co-founded SH Consulting in 2013. He specialized in the field of security for RISC-V FPGAs / SoCs. In 1990s, he co-developed CPUs and chipsets for Sega Saturn and Dreamcast video games. ARM adopted his “16-bit fixed-length instruction” invention for their monumentally successful “ARM7TDMI” and “ARM9TDMI.” In 2000s Shumpei led a development of a minimal operating system for Root of Trust chips used in network routers, 2-5G mobile handsets, and secure tokens in US.
ArchiTek Corporation is a start-up company that develops AI / image processing / audio processing LSI. We are advocating an LSI architecture that can be flexibly defined by software, and working on LSI development that realizes high performance, low cost, and low power consumption, also providing advanced software and solutions.
Shuichi Takada : Master of Electrical and Elecrtonic System of Nagaoka University of Technology.
Engaged in the development of various digital home appliances at Matsushita Electric Industrial Co., Ltd./Panasonic Corporation.
Currently engaged in architecture development and management at ArchiTek Corporation.
Renesas Electronics Corporation At Renesas we continuously strive to drive innovation with a comprehensive portfolio of microcontrollers, analog and power devices. Our mission is to develop a safer, healthier, greener, and smarter world by providing intelligence to our four focus growth segments: Automotive, Industrial, Infrastructure, and IoT that are all vital to our daily lives, meaning our products and solutions are embedded everywhere.
Kimiharu Eto : Head of Musashi Site , Vice president , MCU product Development Division , IoT and Infrastructure Business Unit , Renesas Electronics Corporation. Since joining the Kyushu LSI Development Center of NEC IC Microcomputer System Co., Ltd., he has been engaged in MCU system design, product definition and product management. After gaining development experience in Europe and North America, which has many trendsetters for both in-vehicle and IoT, he is currently in charge of MCU product development for IoT and infrastructure.
NSITEXE, was established in 2017 as a wholly owned subsidiary of DENSO, one of the world’s largest tier one Automotive parts manufacturing companies. The company designs and develops semiconductor IP cores, which are key semiconductor components enabling next generation automotive applications.
Hideki Sugimoto, NSITEXE Inc., CTO : Over 20 years experience as a Processor Architect in NEC and NEC electronics. Major works are “V850 series” CPU core, MIPS ISA based original Micro-architecture MPU called “VR series” and so on. Join to DENSO in 2014 and booting NSITEXE from 2017.
AI Chip Design Center (AIDC) is a NEDO project jointly implemented by AIST and the University of Tokyo. It provides LSI design environments such as EDA tools and logic emulators, AI chip design flows, and SoC platforms to small and medium-sized venture companies to accelerate the development of AI chips in Japan. We are proceeding with the development of this center on the Asano campus of the University of Tokyo, and have started trial operation in October 2019.
Kunio Uchiyama, Invited Senior Researcher of AIST in Japan, is currently the head of the AI chip Design Center which is operated as a NEDO project in Japan. He had worked for the Central Research Laboratory of Hitachi since 1978 and served as Corporate Officer and Chief Scientist. He is a Fellow of IEEE and IEICE. He has been a member of Board of Governors of the IEEE Computer Society since 2016.
RISC-V International is a global nonprofit association based in Switzerland. Founded in 2015, RISC-V brings together 2k+ members in more than 70 countries across industries and technical disciplines. RISC-V supports the free and open RISC instruction set architecture, developing additional extensions, tools, and resources paving the way for the next 50 years of computing design and innovation. RISC-V also connects the community and industry through academia, commercialization, and strategic leadership.
Calista Redmond is the CEO of RISC-V International with a mission to expand and engage RISC-V stakeholders, compel industry adoption, and increase visibility and opportunity for RISC-V within and beyond RISC-V International. Prior to RISC-V International, Calista held a variety of roles at IBM, including Vice President of IBM Z Ecosystem where she led strategic relationships across software vendors, system integrators, business partners, developer communities, and broader engagement across the industry. Focus areas included execution of commercialization strategies, technical and business support for partners, and matchmaker to opportunities across the IBM Z and LinuxOne community. Calista’s background includes building and leading strategic business models within IBM’s Systems Group through open source initiatives including OpenPOWER, OpenDaylight, and Open Mainframe Project. While at IBM, she also drove numerous acquisition and divestiture missions, and several strategic alliances. Prior to IBM, she was an entrepreneur in four successful start-ups in the IT industry. Calista holds degrees from the University of Michigan and Northwestern University.
Andes Technology (TWSE: 6533) was established in Hsinchu Science Park in 2005. Sixteen years in business and a founding Premier member of RISC-V International, Andes is a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and a main force to take RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture (V5) adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 2 billion since 2020 and continues to rise. Up to the end of 2020, the cumulative volume of Andes-Embedded™ SoCs has reached 7 billion.
Florian Wohlrab is one of the first RISC-V Ambassadors and Head of Sales for EMEA and Japan at Andes Technology. His mission is to help bring RISC-V towards mainstream and enable others to easily get started within the RISC-V ecosystem. He is fascinated by the open, modular, compact and innovative RISC-V CPU designs. Before joining Andes Technology he worked in industrial PC and IoT fields, holding various technical and business roles within Europe and Asia.
GigaDevice is a leading fabless company engaged in advanced memory technology and IC solutions. The company was founded in Silicon Valley in 2004 and currently produces a wide range of SPI NOR Flash, SPI NAND Flash, sensors and MCUs for use in embedded, consumer, and mobile communications applications with more than 1 billion units shipped every year. In 2019, GigaDevice launched the world’s first 32-bit RISC-V based general purpose GD32VF103, RISC-V MCU.
Ken Kageyama is in charge of marketing the Japanese market for MCUs and flash memory at GigaDevice. He has been involved in the development, product planning, marketing and sales of semiconductor products such as MCUs, ASICs, IPs, dynamic reconfigurable processors and flash memories.
Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software™ partner for innovative companies developing the electronic products and software applications we rely on every day. Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software security and quality solutions. Whether you’re a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing applications that require the highest security and quality, Synopsys has the solutions needed to deliver innovative, high-quality, secure products. Learn more at www.synopsys.com
Mitsuru Tomono received his Ph. D in 2007 from Nara Institute of Science and Technology. He has more than 4 years experiences as pre-sales application engineer of Synopsys processor solution for Synopsys ASIP Designer tool, ARC Processor family, and, especially, embedded vision processor for AI applications. He achieved many design requirements in collaboration with customers for automotive and embedded vision processing systems.
The Khronos Group is an open, non-profit, member-driven consortium of over 150 industry-leading companies creating advanced, royalty-free interoperability standards for 3D graphics, augmented and virtual reality, parallel programming, vision acceleration and machine learning. Khronos standards include Vulkan®, Vulkan® SC, OpenGL®, OpenGL® ES, OpenGL® SC, WebGL™, SPIR-V™, OpenCL™, SYCL™, OpenVX™, NNEF™, OpenXR™, 3D Commerce™, ANARI™, and glTF™. Khronos members are enabled to contribute to the development of Khronos specifications, are empowered to vote at various stages before public deployment and are able to accelerate the delivery of their cutting-edge accelerated platforms and applications through early access to specification drafts and conformance tests.
Takashi Umezawa : Khronos Group、Regional Vice President、Japan
The Information Technology Institute (ITI) is a member of Vietnam National University Hanoi (VNU), established in 2001 on the basis of reorganization of Vietnam Information Technology Training Institute (established in 1997). The Information Technology Institute has the mission of training high-quality experts at the doctoral and graduate levels and participating in undergraduate training in the field of information technology with the universities within VNU; scientific research, application implementation, technology transfer and consulting in the field of information and communication technology, contributing to the country’s socio-economic development; training professional skills, fostering and improving science and technology levels, popularizing new technologies for domestic and foreign enterprises, units and individuals. The ITI’s scientists is carrying out many research projects related to emerging technologies such as: data science; artificial intelligence (AI); virtual reality/augmented reality (VR/AR); photo/video processing; safety information; blockchain; Internet of Things (IoT); Embedded System; IC and FPGA design, security design for RFID…
Xuan-Tu Tran received a Ph.D. degree in 2008 from Grenoble INP (in collaboration with the CEA-LETI), France, in Micro Nano Electronics. He is currently the Director of the Information Technology Institute – a member university of Vietnam National University, Hanoi (VNU). He is also an adjunct professor of University of Technology Sydney, Australia. He was an invited professor at the University Paris-Sud 11, France (2009, 2010), visiting professor at Grenoble INP in 2011, visiting professor of UEC Tokyo in 2019. He was the Director of VNU-key Laboratory for Smart Integrated Systems (SISLAB) and Co-Director of the Joint Technology Innovation and Research Centre (JTIRC). He is in charge of CoMoSy, VENGME, ReSoNoC, IOTA, ADEN4IOT projects for embedded systems and multimedia applications. He has published more than 100 papers on international conferences and journals. His research interests include design and test of systems-on-chips, networks-on-chips, design-for-testability, asynchronous/synchronous VLSI design, low power techniques, and hardware architectures for multimedia applications. He is a Senior Member of the IEEE, member of IEICE and REV Vietnam.
Imagination Technologies provides world-leading IP cores. We have over 25 years of experience in designing and licensing market-leading processor solutions for graphics, vision & AI processing, and multi-standard communications that offer strong differentiation compared to competing solutions. Creating a smarter, more connected world that enriches the lives of billions of people, our technologies are instrumental in key segments such as mobile; consumer; automotive; IoT; AR/VR; security and AI.
AZKY Tech Labs is a software consulting firm based in UK specializing in creating bespoke web apps using bubble.io, a fast-growing no-code platform. Founded and led by Zubair Kakakhel, the team at AZKY has successfully deployed fully functional apps of varying complexity levels from the ground up in just a matter of weeks.
Zubair Kakakhel received his MSc in Embedded systems engineering from the University of Leeds, UK in 2013. He has since worked as a Linux kernel engineer and team lead for various organizations including Imagination Technologies, MIPS and Balena. Zubair founded his software consulting firm, AZKY Tech Labs in 2020. Currently, he and his team are delivering software solutions in a variety of areas using cutting edge tools and platforms. Zubair is passionate about giving back to the community and sharing his learnings.
Makoto Ikeda received the BE, ME, and Ph.D. degrees in electrical engineering from the University of Tokyo, Tokyo, Japan, in 1991, 1993 and 1996, respectively. He joined the University of Tokyo as a research associate, in 1996, and now professor at d.lab, school of Engineering, the University of Tokyo. He is also the professor at department of Electrical Engineering and Information Systems, graduate school of engineering, the University of Tokyo, where he served as a department head in 2017. He stayed in Cambridge University as a visiting Researcher in 2001-2001. He has been involving the activities of VDEC to promote VLSI design educations and researches in Japanese academia. And now initiated “AI chip design project” for Japanese startups, supported by Ministry of Economy, Trade and Industry (METI) of Japan.
His research topics including hardware security, including crypto accelerator design, secure sensor design, smart image sensor for 3-D range finding, and time-domain circuits including asynchronous controlling and associate memories.
The Khronos Group is an open, non-profit, member-driven consortium of over 150 industry-leading companies creating advanced, royalty-free interoperability standards for 3D graphics, augmented and virtual reality, parallel programming, vision acceleration and machine learning. Khronos standards include Vulkan®, Vulkan® SC, OpenGL®, OpenGL® ES, OpenGL® SC, WebGL™, SPIR-V™, OpenCL™, SYCL™, OpenVX™, NNEF™, OpenXR™, 3D Commerce™, ANARI™, and glTF™. Khronos members are enabled to contribute to the development of Khronos specifications, are empowered to vote at various stages before public deployment and are able to accelerate the delivery of their cutting-edge accelerated platforms and applications through early access to specification drafts and conformance tests.
Neil Trevett is Vice President of Developer Ecosystems at NVIDIA where he helps enable applications to take advantage of advanced GPU and silicon acceleration. Neil is also the elected President of the Khronos Group, where he initiated the OpenGL ES standard now used by billions worldwide every day, helped catalyze the WebGL project to bring interactive 3D graphics to the Web, fostered the creation of the glTF standard for 3D assets, chairs the OpenCL working group defining the open standard for heterogeneous parallel computation, and helped establish and launch the new-generation Vulkan API.
NSITEXE was established in 2017 as a wholly owned subsidiary of DENSO, one of the world’s largest tier one Automotive parts manufacturing companies. The company designs and develops semiconductor IP cores, which are key semiconductor components enabling next generation automotive applications.
Seiji Nishimura is a Japanese software engineer specializing in supercomputing. He is currently working for NSITEXE Inc. Prior to NSITEXE, he used to work for Huawei, Cray, Inc. and SGI. He has been involved in parallel computing since the mid-1990s, when distributed-memory parallel computers started to appear in the market. His technical interests are mainly in performance scalability and performance portability of parallel programs.
StarFive is the leader of RISC-V technology and ecosystem development in China, with a complete and silicon-proven portfolio of RISC-V CPU IP series and platform-based software and hardware full stack chip solution. StarFive products are widely used in smart home appliances, smart monitoring, industrial robots, etc.
Masayuki Kimura is an engineer at StarFive.
Ubiquitous AI Corporation, a solutions vendor, provides marketing, development and engineering services focused on the engineering of software for embedded systems, communications and networks. Ubiquitous AI Corporation is also has been at the forefront of technological advancement with its Small, Fast and Light ethos. Every year millions of new devices containing Ubiquitous AI Corporation’s software are sold worldwide.
Shigeru Kojima | Director, Embedded Platform Division | Shigeru Kojima joined Ubiquitous Corporation in 2006 after several activities in Microsoft Japan. He worked for various embedded middleware development including original network stack “Ubiquitous Network Framework”. Since 2020 he assigned to develop secure IoT service “Edge Trust”. His hobby is to build PC and software, also loves gadget devices.
Red Hat, Inc. is the world’s leading provider of enterprise open source solutions, using a community-powered approach to deliver high-performing Linux, cloud, container, and Kubernetes technologies. Red Hat helps customers standardize across environments, develop cloud-native applications, and integrate, automate, secure, and manage complex environments with award-winning support, training, and consulting services.
Wei Fu is a Linux kernel/distro developer with Embedded/Enterprise experience on Linux kernel/driver ,BSP, system porting, CI-loop, Koji system and testing. Also have some experience on Firmware (U-boot/arm-TF/UEFI/ACPI/GRUB). Currently studying Linux distro,like Fedora/RHEL/CentOS on RISC-V, and now focusing on promoting RISC-V to Fedora Primary Architectures.
Munetomo Maruyama has been engaged in development of MCUs and SoCs equipped with 16-bit fixed-length instruction 32-bit RISC, ARM7, ARM9, Cortex-M, self designed parallel multiple cores for high-performance video codec etc. since 1986., and in addition has been writing about 100 magazine articles and about 10 books on MCU, FPGA, GPU, logic design, and programming.
CloudBEAR provides commercial RISC-V processor IP. CloudBEAR’s BM, BR, BI series are covering a wide range of applications from small low-power microcontrollers to high-performance accelerators and Linux capable devices
Alexander Kozlov is co-founder and CTO of CloudBEAR. Alexander has more than 15 years’ experience in developing software/hardware solutions based on FPGA and ASIC design. He has Master degree an EECS from Saint-Petersburg State Polytechnical University. He started his career as ASIC design engineer, then moved to algorithms and hardware architecture research. He has focused on microarchitecture/algorithms co-design in telecommunication and multimedia processing systems. Before CloudBEAR he held various engineering management positions in hardware companies.
Syntacore , a founding member of RISC-V Foundation, is a leading vendor of the RISC-V compliant processor IP and related services since 2015. Syntacore offers state-of-the-art family of RISC-V compliant processor IP, silicon proven at the customers, including full-wafer production. Company also provides turn-key IP customization services, including workload analysis, ISA extension design and all RTL and verification works with full tools/compiler support.
Alexander Redkin is Executive Director and co-founder at Syntacore. Prior to establishing Syntacore in 2015, Alexander had more than 15 years of experience in semiconductor industry in senior engineering and management roles, including more than 12 years at Intel R&D, where he contributed both to the number of research projects and volume semiconductor products development. Alexander’s research interests are future SoC architectures and heterogeneous platforms with specific focus on emerging workloads analysis and acceleration.
SH Consulting Group (SHC) has engineers in US, Vietnam and in Japan specialized in providing stability to RTOS, device drivers, and wireless connectivities for MCUs such as H8s, SHs, ARMs and RISC-Vs. It has been integrating OSes such as QNX, .NETMF, Linux, and Windows for MCUs and wireless solutions such as Lora, WiFi and Bluetooth for many years. They worked on Windows, Android and iOS platforms. In recent years SHC engineers enabled FreeRTOS for large semiconductor companies on ARM platforms and direct this effort to RISC-Vs.
Hoan Huynh is a Senior Software Engineer at SHC Vietnam. Graduated from Ho Chi Minh Polytechnic University in Electrical-Electronic major. Hoan has more than 20 years in microprocessor and digital systems design. He is familiar with almost embedded systems such linux, QNX, FreeRTOS.