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RISC-V Day Vietnam 2020

             
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RISC-V Day Online Vietnam 2020 Program Schedule

September 18, 2020 (Fri) 10:00 – 17:00 ICT (Indochina Time, GMT+7)

The hashtag for the conference is #riscv_day.

Schedule is in Indochina Time (ICT, GMT+7)

TimeLangPresentation TitleSpeaker | AffiliationMedia
10:00EWelcome and Introduction from Moderator    Takahiro Kitayama*| KAMAKE no SUSUME Corp.
10:10EWhy Are We Using RISC-V as a Model Processor for University Education?    Hideharu Amano* | Keio UniversityVideo
PDF
10:40ERISC-V: Instruction Sets Want to be FreeKrste Asanovic*, Chairman, RISC-V International / University of California, BerkeleyVideo
PDF
11:10VVanguard – the first Open Source RISC-V SoC project in VietnamVLSI Technology Page, Quynh Do-ngoc* and Quan Nguyen-hungVideo
PDF
11:40EAdvanced SIMD architecture derived by applying RISC-V architectureYamaguchi Yoshiki*, Tan Yuxi, and Abdelhamid Riadh Ben | University of TsukubaVideo
12:10ERISC-V Linux Distro Status and Build System for RPM-like System Wei Fu | Senior Software Engineer,  Red Hat Software (Beijing) Co., Ltd.Shanghai BranchVideo
PDF
12:40ーIntermission Intermission
 13:10VMicroprocessors: X86, ARM, and the future is RISC-VThang Tran, Ph.D | Principal Engineer, Andes TechnologyVideo
PDF
13:40ETEE Hardware for RISC-V ImplementationCkristian Duran*, Trong-Thuc Hoang, Cong-Kha Pham | UEC, Akira Tsukamoto, Kuniyasu Suzaki | AIST, TRASIOVideo
PDF
14:10
EASA RISC-V Processor Optimized For Edge AI/ML, Security, Smart IoT Sensors    Islam Md Ashraful*, ASAMicroVideo
PDF
14:40ERISC-V Dedicated High-Performance Computers for Designing MedicineMakoto Taiji*, RIKEN Center for Biosystems Dynamics ResearchVideo
15:10VResearch and Development Activities on RISC-V and its Applications for IoTsDuy-Hieu Bui* | SISLAB, VNU University of Engineering and Technology, and Xuan-Tu Tran | Vietnam National University, HanoiVideo
15:40EDigital Design in ChiselMartin Schoeberl*,  Associate Professor, Technical University of DenmarkVideo
PDF
16:10ENew RISC-V Security DirectionsShumpei Kawasaki*, SH Consulting Vietnam Company LimitedVideo
PDF
16:40EAI: Scale from Edge to Server with RISC-V and LinuxFlorian Wohlrab*, Head of Sales for EMEA and Japan, Andes TechnologyVideo
PDF
17:10VGreetings from Organizer (Message Read)Cong-Kha Pham*, University of Electro-CommunicationsVideo
PDF

 

 

Virtual Demo Booth

The virtual demo booth provides opportunities for visitors to “see” demos and ask questions through a live streaming.

 

Tentative Virtual Booths Plan

TimeTitleCompany / OrganizationMedia
10:00-16:00SHC RISC-V Reiwa Demo: Andes N22 / HiFive1 connected to AWS CloudSH Consulting Vietnam Company LimitedPDF
Video
10:00-16:00RIKEN Adopted Chipyard Framework for Bayesian Neural Networks Training Accelerator DevelopmentLaboratory for Computational Molecular Design, RIKEN Center for Biosystems Dynamics ResearchPDF

 

A Book of Interest

This book is an introduction into digital design with the focus on using the hardware construction language Chisel. Chisel brings advances from software engineering, such as object-orientated and functional languages, into digital design.This book addresses hardware designers and software engineers. Hardware designers, with knowledge of Verilog or VHDL, can upgrade their productivity with a modern language for their next ASIC or FPGA design. Software engineers, with knowledge of object-oriented and functional programming, can leverage their knowledge to program hardware, for example, FPGA accelerators executing in the cloud.The approach of this book is to present small to medium-sized typical hardware components to explore digital design with Chisel. Press here and choose red pill or blue pill. 

Looking forward to seeing you all !

 

About RISC-V Association

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RISC-V Association is an association among RISC-V Foundation member companies. RISC-V Foundation defines Member Sponsored Events and Meetups as regional efforts and RISC-V Association supports these events. Presently Software Hardware Consulting handles business ends of this activity.

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