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RISC-V Days Tokyo 2022 Autumn Online RISC-V Pavilion

 


 

ImperasDV for RISC-V processor functional design verification Demo PDF Demo Video

Booth Attendant:
Shuzo Tanaka
VP & Director
Engineering Department
eSOL Trinity Co., Ltd.

Imperas is the leader in RISC-V simulation solutions. For RISC-V processor DV the ‘lock-step-compare’ methodology verifies the core RTL against a high-quality reference including asynchronous events and debug operations.

ImperasDV natively supports the open standard RVVI (RISC-V Verification Interface) that covers the RISC-V ISA (Instruction Set Architecture) including privileged mode, vector accelerators, multi hart, multi-cores, as well as custom extensions.

The Imperas RISC-V Reference model can be encapsulated within a UVM test bench and SystemVerilog environment to give a unified debug experience across the RTL and Reference model to enable efficient issue resolution when a discrepancy is found.

 


 

Marmot System with PSU and Solar power supply Demo PDF YouTube Demo Video

Booth Attendant:
Hoan Huynh
Senior Software Engineer, SH Consulting Vietnam Company Limited



Figure 1: Full Diagram of a RISC-V AWS IoT Core Device Example

This demonstration shows a capacity of PSU (Power Supply Unit) for manage power for Marmot System by using Solar panel and battery. By monitor voltage on the Solar and Battery, PSU can decide resource of power supply will be use. In the case good sunshine, PSU use power from Solar to (1) Keep the system work as normal (2) Can charge for battery. Otherwise PSU can use power from battery.

 


 

About RISC-V Association

RISC-V-logo-figonly-mod-2

RISC-V Association is an association among RISC-V Foundation member companies. RISC-V Foundation defines Member Sponsored Events and Meetups as regional efforts and RISC-V Association supports these events. Presently Software Hardware Consulting handles business ends of this activity.

Recent Posts

  • On June 20, 2023, the RISC-V Alliance Japan will sponsor Japan’s largest RISC-V conference, “RISC-V Days Tokyo 2023 Summer.” A trade show and poster session will also be held at the same time.
  • RVfpga: Understanding Computer Architecture In-person Workshop 7th and 8th, March ’23
  • RISC-V is expanding in applications from automobiles to enterprises — Commemorating 10 billion RISC-V core shipments — RISC-V JAPAN 2022 product award winners and award ceremony location released
  • HURRY: PACIFICO YOKOHAMA NORTH 3rd Floor G313 Venue map unveiled (RISC-V Days Tokyo 2022 Autumn) November 16-18
  • RISC-V Days Tokyo 2022 Autumn will be broadcasted on November 16-18 at G313 3rd floor Pacifico Yokohama North
  • May 31st-June 2nd “RISC-V Days Tokyo 2022 Spring” event additional information! RISC-V Association decided to release the contents of the program
  • A small company designed and prototyped RISC-V ASIC in 30 days using Google’s sponsored eFabless open source shuttle
  • Feel the Tectonic Shift in Semiconductor Industry at RISC-V Days Tokyo 2022 Online Spring!
  • May 31st to June 2nd, 2022. “RISC-V Days Tokyo 2022 Spring”
  • January 15, 2022 RISC-V Day Vietnam 2022 Presentation Materials are being added now.

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