Esperanto Technologies: Esperanto delivers high-performance, energy-efficient computing solutions, the compelling choice for the most demanding AI / ML / DL applications. Our founding team, with many decades of processor design and architecture experience, is dedicated to delivering solutions to help drive future computing innovation. The changing, computationally intensive, workloads of the machine learning era mandate a new clean-sheet solution, without the baggage of existing legacy architectures. Esperanto leverages the simple, elegant, open standard RISC-V instruction set architecture (ISA) to deliver flexibility, scalability, performance and energy-efficiency advantages.

Eiji Kasahara Eiji is a Sr. CPU Architect for Esperanto‘s SOC(Supercomputer on Chip). His recent RISC-V association’s achievements include Organizer and Program Committee, the planning of RISC-V related translation books, and 2017 and 2018 speaker. Eiji is also famous for his role as an architect of PlayStation3’s Cell Broadband Engine (CELL/BE). Eiji was responsible for development of CELL/B.E design, power-performance, semiconductor process technologies in 90nm, 65nm, and 45nm generation SOI process technologies to reduce cost and power as Deputy of STI(Sony-Toshiba-IBM) Design Center in Austin, Texas. Before joining Sony Corporation, Eiji developed NEC SX-5 supercomputer and NEC ACOS4 mainframe computers in Japan.

KAMAKE no SUSUME Corp. offers event programming service including computer programming and gizmo-building classes for children and working adults, human resource activation events and training for local communities and companies, promotion of STEM education in collaboration with educational institutions and companies, and enriches people’s lives.

Takahiro Kitayama was born in Osaka, and completed the Department of Electrical and Electronic Engineering, Graduate School of Engineering, Kobe University, and joined Renesas Electronics Corporation in 2013. In 2014, he started with volunteer engineers on holidays. He founded “KAMAKE no SUSUME Corp.” in December 2017.

Keio University Faculty of Science and Technology Department of Information Engineering: Keio University Amano Lab researches new computer architecture in Post-Moore Age. As semiconductor scalings are stopping, it’s time to create new computers with special purpose, reduced power, and dynamic structure. His team is not only conducting simulation but also creating actual LSI chip and board, system construction and verification.

Prof. Hideharu Amano received his Ph.D. in 1986 from Keio University. He was a visiting assistant professor at Stanford University from 1989-1990. Now, he is a professor at the Department of Information and Computer Science, Keio University. Hideharu Amano started research on computer architecture under the professor Hideo Aiso, Department of Electrical Engineering, and shared memory, cache, switch chip, multiprocessor, reconfigurable system, massively parallel system, router chip, multi-context device, power saving Reconfigurable accelerator, ultra-low power processor, consistent architecture research. It is known for its approach to developing and evaluating real systems to demonstrate ideas. In addition to translating Hennessy Patterson’s “quantitative approach”, he has held numerous academic committee positions and positions.

Imagination Technologies provides world-leading IP cores. We have over 25 years of experience in designing and licensing market-leading processor solutions for graphics, vision & AI processing, and multi-standard communications that offer strong differentiation compared to competing solutions. Creating a smarter, more connected world that enriches the lives of billions of people, our technologies are instrumental in key segments such as mobile; consumer; automotive; IoT; AR/VR; security and AI.

AI Chip Design Center (AIDC) is a NEDO project jointly implemented by AIST and the University of Tokyo. It provides LSI design environments such as EDA tools and logic emulators, AI chip design flows, and SoC platforms to small and medium-sized venture companies to accelerate the development of AI chips in Japan. We are proceeding with the development of this center on the Asano campus of the University of Tokyo, and have started trial operation in October 2019.

Kunio Uchiyama, Invited Senior Researcher of AIST in Japan, is currently the head of the AI chip Design Center which is operated as a NEDO project in Japan. He had worked for the Central Research Laboratory of Hitachi since 1978 and served as Corporate Officer and Chief Scientist. He is a Fellow of IEEE and IEICE. He has been a member of Board of Governors of the IEEE Computer Society since 2016.

Andes Technology (TWSE: 6533) was established in Hsinchu Science Park in 2005. Sixteen years in business and a founding Premier member of RISC-V International, Andes is a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and a main force to take RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture (V5) adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 2 billion since 2020 and continues to rise. Up to the end of 2020, the cumulative volume of Andes-Embedded™ SoCs has reached 7 billion.

Florian Wohlrab is one of the first RISC-V Ambassadors and Head of Sales for EMEA and Japan at Andes Technology. His mission is to help bring RISC-V towards mainstream and enable others to easily get started within the RISC-V ecosystem. He is fascinated by the open, modular, compact and innovative RISC-V CPU designs. Before joining Andes Technology he worked in industrial PC and IoT fields, holding various technical and business roles within Europe and Asia.

SiFive is the leading provider of market-ready processor core IP and silicon solutions based on the free and open RISC-V instruction set architecture. Led by a team of seasoned silicon executives and the RISC-V inventors, SiFive helps SoC designers reduce time-to-market and realize cost savings with customized, open-architecture processor cores, and democratizes access to optimized silicon by enabling system designers in all market verticals to build customized RISC-V based semiconductors. With 15 offices worldwide, SiFive has backing from Sutter Hill Ventures, Qualcomm Ventures, Spark Capital, Osage University Partners, Chengwei, Huami, SK Hynix, Intel Capital, and Western Digital.

Atsushi Ishii has over 10+ year experience as President of Axis Japan Co.Ltd., Verisity Design K.K. & Carbon Design Systems Japan K.K. He is currently the representative in Japan of SiFive,Inc..

DTS INSIGHT CORPORATION has been started as a member of DTS group, merging with Yokogawa Digital Computer Corporation and ART System Co., Ltd. and embedded related business of DTS CORPORATION on April 1th, 2017. Our major business are, System development product in automotive/embedded field, Hardware/Firmware development, Measurement control system in healthcare field, and Commissioned development in various fields, etc. DTS INSIGHT have supported customer’s business as above in each company’s strong field, and will achieve services for the world of IoT continued to evolve further in the future.

Yoshihito Kondo has been working for Sony Corporation since 1990 and has been involved in the development of media processor. Engaged in CMOS image sensor development at Sony LSI Design Inc. from 2012. Joined DTS Insight Co., Ltd. in 2019 and is currently in charge of agency operations for SiFive.

GigaDevice is a leading fabless company engaged in advanced memory technology and IC solutions. The company was founded in Silicon Valley I n 2004 and currently produces a wide range of SPI NOR Flash, SPI NAND Flash, sensors and MCUs for use in embedded, consumer, and mobile communications applications with more than 1 billion units shipped every year. In 2019, GigaDevice launched the world’s first 32-bit RISC-V based general purpose and in 2020 the GD32VF103, RISC-V MCU, won the international award of hardware product of the year at the Embedded World 2020 in Nuremberg Germany.

Ken Kageyama is in charge of marketing the Japanese market for MCUs and flash memory at GigaDevice. He has been involved in the development, product planning, marketing and sales of semiconductor products such as MCUs, ASICs, IPs, dynamic reconfigurable processors and flash memories.

CloudBEAR provides commercial RISC-V processor IP. CloudBEAR’s BM, BR, BI series are covering a wide range of applications from small low-power microcontrollers to high-performance accelerators and Linux capable devices

Alexander Kozlov is co-founder and CTO of CloudBEAR. Alexander has more than 15 years’ experience in developing software/hardware solutions based on FPGA and ASIC design. He has Master degree an EECS from Saint-Petersburg State Polytechnical University. He started his carrier as ASIC design engineer, then moved to algorithms and hardware architecture research. He has focused on microarchitecture/algorithms co-design in telecommunication and multimedia processing systems. Before CloudBEAR he held various engineering management positions in hardware companies.

IAR Systems: We are dedicated to provide superior technology and services, enabling our customers to create the products of today and the innovations of tomorrow. Our journey started in 1983 in Uppsala, Sweden, with the engineer Anders Rundgren and his launch of the world’s first C compiler for the 8051 microcontroller architecture. Since then, our solutions have ensured quality, reliability and efficiency in the development of millions of products built on embedded systems all over world. Today, over 150,000 developers are using our software.Throughout the years, we have evolved and fine-tuned our technology to stay ahead of competition and always serve our customers in the best way we can. We have friends at all major suppliers in our industry, enabling great knowledge sharing and powerful technology innovation worldwide.

Shawn Prestridge has served as IAR System’s Senior Field Applications Engineer since 2008. Shawn has worked in the software industry since 1993 and prior to joining IAR Systems he held the position of Embedded Hardware/Software Engineer with Texas Instruments as well as doing Embedded Development as the owner of Ministry of Software.

Naoki Matsuda has been in charge of the automotive domain mainly in Japan. Since this April, he also has been in charge of domestic RISC-V business development.

Anagix Corp. specializes in EDA development and LSI design needing analog expertise, but does not sell as ordinary companies do. Our goal is to support the development of high-value-added LSIs in small quantities that conventional LSI companies cannot. We provide a low-cost design environment that utilizes OSEDA, and transfer design knowledge so that customers can design LSIs themselves.

Seijiro Moriyama worked for a major electrical company for 24 years and engaged in EDA R&D. During that time, he participated in Cadence alliance and stayed in the United States. After interacting with Western EDA vendors at INNOTECH and PDF Solutions, he founded Anagix Corp. in 2009. He participated in the MakeLSI project and has been involved in the development of minimal fab EDA since 2017 while promoting the use of open source EDA.

Espressif Systems is a public multinational, fabless semiconductor company focused on developing cutting-edge WiFi-and-Bluetooth, low-power IoT solutions. We created the popular ESP8266 and ESP32 series of chips, modules and development boards, offering secure, robust and power-efficient IoT solutions.
By open-sourcing our technology, developers can use Espressif’s technology globally and build smart connected devices.

Jeroen Domburg is a Senior Software and Technical Marketing Manager at Espressif Systems. With more than 20 years of embedded experience, he is involved with both the software as well as the hardware design process of Espressifs SoCs.

Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software™ partner for innovative companies developing the electronic products and software applications we rely on every day. Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software security and quality solutions. Whether you’re a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing applications that require the highest security and quality, Synopsys has the solutions needed to deliver innovative, high-quality, secure products. Learn more at www.synopsys.com

Mitsuru Tomono received his Ph. D in 2007 from Nara Institute of Science and Technology. He has more than 3 years experiences as pre-sales application engineer of Synopsys processor solution for Synopsys ASIP Designer tool, ARC Processor family, and, especially, embedded vision processor for AI applications. He achieved many design requirements in collaboration with customers for automotive and embedded vision processing systems.

Efinix is an FPGA company, offering high-performance, high-density and lower power products featuring its disruptive Quantum Compute Fabric. Its scalable Titanium family is fabricated in 16nm for applications ranging from edge to data center. Soft RISC-V cores and Quantum Acceleration ensure optimum system performance and fast time to market.

Ikuo Nakanishi has 25 years of FPGA experience. Started at Altima as a FAE supporting ALTERA FPGAs and gained a lot of knowledge about FPGAs, Processors, DSPs, and high-speed interfaces, and then went on to work for Xilinx and Quick Logic, and is now the Japan representative for Efinix.

Syntacore , a founding member of RISC-V Foundation, is a leading vendor of the RISC-V compliant processor IP and related services since 2015. Syntacore offers state-of-the-art family of RISC-V compliant processor IP, silicon proven at the customers, including full-wafer production. Company also provides turn-key IP customization services, including workload analysis, ISA extension design and all RTL and verification works with full tools/compiler support.

Alexander Redkin is Executive Director and co-founder at Syntacore. Prior to establishing Syntacore in 2015, Alexander had more than 15 years of experience in semiconductor industry in senior engineering and management roles, including more than 12 years at Intel R&D, where he contributed both to the number of research projects and volume semiconductor products development. Alexander’s research interests are future SoC architectures and heterogeneous platforms with specific focus on emerging workloads analysis and acceleration.

Hara Lab at Tokyo Institute of Technology researches design automation technologies and computer architecture for next-generation IoT/embedded systems widely from hardware and software perspectives.

Yuko Hara-Azumi received her Ph.D. degree in Information Science from Nagoya University, Japan in 2010. She was a postdoctoral research fellow funded by Japan Society for the Promotion of Science from 2010 to 2012, during which she was also a visiting scholar at University of California, Irvine, USA and Karlsruhe Institute of Technology, Germany. In 2012, she joined Nara Institute of Science and Technology as an Assistant Professor. Since 2014, she has been with Tokyo Institute of Technology, where she is currently an Associate Professor. Her research interests include system-level design automation, especially on high-level and logic synthesis, microprocessor architectures, and hardware/software co-design for embedded/IoT systems.