Call for Posters for RISC-V Day Tokyo 2024 Winter (New)

In this RISC-V Day, we will hold a poster session to share the latest technology and research. We are looking forward to
your participation and interaction with many participants.
To increase researcher’s exposure, develop careers, provide feedback and learning, enhance communication skills, and
discover their own characteristics, RISC-V Day will add the following activities to the regular poster session for those
who wish to.

How System Works
1. For researchers who hold a poster session, the conference participation fee will be free. A free book (402 pages)
will be presented at the site.
2. Participants will be given the opportunity to give a podium presentation in addition to explaining the poster, and the
presentation will be video recorded.
3. This recorded video will be posted on the web, along with a PDF for the presentation, reaching a wider audience.
4. On the web, the participant’s BIO (history) and research keywords will be posted, and we will make it a high page
rank in search.
5. The presentation does not have to be new content. Introductions to existing research and projects are also
welcome. It is an opportunity to introduce your interests and experiments.
6. For those who wish, we will prepare a desk and power supply. Participants can do demos.
The following are the same as a normal poster session but let me explain the details.
7. Poster session participants are provided with individual panels (90cm x 180cm or 210cm), and if necessary the
organizer will prepare an A0 size poster by themselves. If desired, a side table will be set up next to the panel, and
power and WiFi are planned to be provided.
8. The poster session is considered part of the presentation, and participants explain to visitors at their own panels.
9. We will arrange a coordination (including hosting) of the podium presentation.
10. Video recording, web creation, etc. will be prepared by the organizer.

Call for Themes:
At RISC-V Day, we are calling for poster sessions on the following fields. These themes show new approaches to meet
expanding computational needs and sustainability challenges.
1 RISC-V technology: Instruction sets, microarchitecture, integrated circuits, IP, chips, systems, software, and the
implementation of RISC-V extensions/customizations.
2 Open-Source Hardware Revolution: Open silicon starting with RISC-V Green Computing: Techniques for reducing
energy consumption in computing environments, including RISC-V based solutions.
3 Hardware and Software Co-design: Examples and case studies showing the impact of RISC-V and open-source
hardware or software development, and vice versa.
4 AI and Machine Learning: Role of RISC-V in accelerating AI/ML workloads, customizing hardware for AI/ML,
5 Real World Applications: Industry or research projects that have used RISC-V in product development, research
outcomes, etc.
6 Security technologies for open architecture
7 AIoT, IoT RISC-V Architecture
8 Quantum Computing
9 Secret Computing – Privacy-enhancing data analysis technology represented by Homomorphic Encryption, which
computes with encrypted data.
10 Emerging Computing Topic: Topics like neuromorphic computing, bio-inspired computing, and new forms of non-
volatile memory technologies.
11 High-Performance Computing (HPC): The use of RISC-V in HPC applications, challenges, and innovations in
creating competitive RISC-V based HPC systems.
12 Edge Computing: The role of RISC-V in the growth of edge computing, including applications in smart cities,
autonomous vehicles, and IoT.
13 5G/6G Technologies: How RISC-V can be incorporated into the next generation of telecommunications
infrastructure and the role it plays in network devices.
14 Blockchain and Distributed Ledger Technologies: Use cases of RISC-V in blockchain hardware, smart
contracts, and how it can provide secure and efficient computation in decentralized systems.
15 Quantum-resistant Cryptography: With the advent of quantum computing, exploring how RISC-V can be used to
develop quantum-resistant cryptographic solutions.
16 Cross-platform Development Tools: Tools that support RISC-V development across different platforms, easing
the development process and fostering wider adoption.
17 Interoperability with Other Architectures: How RISC-V interfaces with other architectures, emulation, and
virtualization technologies to create hybrid systems.
18 Sustainable and Eco-friendly Computing: Beyond just green computing, a focus on how RISC-V hardware can
be designed with sustainability in mind, including recyclable materials, energy harvesting, and lifecycle analysis.
19 Digital Signal Processing (DSP): Applications of RISC-V in DSP for audio, video, and communications
20 Space Technology: The use of RISC-V in space applications, which could include satellites, rovers, and other
space exploration hardware.
21 Educational Initiatives: How RISC-V is being used for educational purposes, in teaching computer architecture,
hardware design, and fostering a new generation of engineers.
22 Medical and Biotech Applications: Implementation of RISC-V in medical devices, biotechnology, and
personalized medicine, including wearable technologies.
23 Automotive and Transportation Systems: The role of RISC-V in the future of transportation, including self-driving
cars, electric vehicle systems, and more.

24 Formal Verification for RISC-V: Approaches to ensuring the correctness and security of RISC-V processors
through formal methods.
25 Cultural and Societal Impacts of Technology: Discussing the broader impacts of open-source hardware and
RISC-V on society, accessibility, and digital divide issues.
In addition to the above, we are soliciting poster sessions on a wide range of RISC-V related fields. We will review new
ideas, research results, business applications, etc., with an open mind, so please feel free to apply.

• Abstract registration deadline: December 28, 2023
• Submission deadline: December 28, 2023
If the proposal arrives early, we will inform you of the acceptance/rejection result before December 28.
Submission Guidelines:
Submission site:
• The poster should be of A0 size, portrait orientation.
• The title, authors and their affiliations should be clearly visible at the top of the poster.
• The poster should be easy to read from 1.5 meters.
• The authors are required to include an abstract (up to 250 words) along with their submission.

Assessment Criteria:
The posters will be judged based on the following criteria:
• Originality and novelty of the research/idea.
• Quality and clarity of the research methodology.
• Relevance to the themes of the conference.
• Quality of the poster design and presentation.

The best poster will be awarded at the closing ceremony of the conference, based on the assessment of the judges.
We look forward to your active participation in RISC-V Day! Let’s contribute to the evolution of computing technology
and sustainability together with RISC-V.
(Note: Please ensure to adhere to COVID-19 safety guidelines as recommended by the health authorities during the