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Siemens EDA, known for the Caliber used to tape-out the state-of-the-art finest geometry chips, first pointed out the surge of “domain-specific architecture.”
For example, a global capital-backed cloud service provider called GAFA has to digest workloads such as search engine PageRank mechanisms, data center AI processing, and real-time transcoding required for video broadcasts in-house. There is a movement to design and manufacture semiconductors with functions specialized in application fields and use them in-house. All major smartphone players design and manufacture dedicated system-on-chips in-house without exception. All of these chips with a “domain-only architecture” outsourced by these major system makers using TSMC’s state-of-the-art process are specialized only for specific applications such as smartphones.
Many semiconductor designs are likely to move away from semiconductor companies and spread to a wide range of engineers, including major small and medium-sized system makers, semiconductor users, venture companies, and even individuals. The OpenROAD and OpenLane approaches that Google is advancing with DARPA support will transform the world of semiconductor design as well as RISC-V. The story of semiconductor design technology that applies AI methods is also interesting. It seems that AI applications are advancing in process management of semiconductor production, but there are various movements in terms of design technology.
Many of Japan’s neighboring countries have excellent software development capabilities. International cooperation and cooperation with these countries is also becoming more important. On March 19th, Prime Minister Kishida visited India. I think the term “bilateral” was used to overcome geopolitical issues, but the concept of “bilateral” is also used in open source software hardware such as RISC-V. It is important. In semiconductor design, software design is two sides of the same coin. This time, we would like to invite people who are educating software and hardware in Asia such as Indian Institute of Technology (IIT), Red Hat China, etc. to explore future technical cooperation.
RISC-V is increasing its presence in Japan as semiconductor companies such as Intel adopt RISC-V. RISC-V-oriented Open Architecture is steadily spreading around the world. With the adoption of RISC-V by Renesas Electronics and full-scale participation in Intel’s RISC-V International, it seems that it will gain even more momentum. RISC-V is becoming more popular in AI-related and US government-related LSI development accelerated by the CHIPS bill.
event name:
RISC-V Days Tokyo 2022 Spring
Risk Five Days Tokyo 2022 Spring
Date and method:
May 31st (Tuesday) 13: 00-17: 00 (Japan time)
June 1st (Wednesday) 10: 00-15: 00 (Japan time)
June 2 (Thursday) 10: 00-15: 00 (Japan time)
It will be held online via online distribution by Vimeo.
Registration site: https://peatix.com/event/3177358/view
Conference information site: https://riscv.or.jp/risc-v-days-tokyo-2022-spring/
SNS:
Web: https://riscv.or.jp/
Twitter: @riscv_a
Slack: https://risc-v-association.slack.com
Facebook: https://www.facebook.com/riscv.a
partner:
platinum
Siemens EDA (Siemens Digital Industries Software: USA)
Imperas Software Ltd. (UK)
Google (Google LLC: USA)
DTS Insight Co., Ltd. (Japan)
SH Consulting Co., Ltd. (Japan)
Silver
IAR Systems Co., Ltd. (Japan)
SIGNATE Co., Ltd. (Japan)
GigaDevice Semiconductor (China)
Esol Trinity Co., Ltd. (Japan)
Imagination Technologies (UK)
Efinix, Inc. (USA)
Codasip (Headquarters Germany)
MIPS Tech, LLC (USA)
Sponsorship
RISC-V International (RISC-V International: Switzerland), Embedded Systems Technology Association (Japan), Indian Institute of Technology-Madras
Call for general presentations: Scheduled to be adopted in mid-May. https://riscv.or.jp/en/risc-v-days-tokyo-2022-spring-en/cfp
Organizer: RISC-V Association
Office location, phone number, zip code, person in charge
〒104-0061 7-18-13-502, Ginza, Chuo-ku, Tokyo
Shunpei Kawasaki (Chairman)
Yasuyuki Saito (Secretariat)
Phone: 03-5565-0556, E-mail: yasuyuki <dot> saito <at> riscv <dot> or <dot> jp
RISC-V Association Publications
Digital circuit design starting with Chisel -Digital design with Chisel SECOND EDITION- 2nd edition (Japanese version) Book (soft cover)
Publisher: RISC-V Association (2021/11/16)
Release date: 2021/1/1
Language: Japanese
Book (soft cover): 202 pages
ISBN-10: 4991233801
ISBN-13: 978-4991233807
Price: 2,200 yen (tax included)