Category: 未分類
DMP Designed an Originally Designed RISC-V CPU and Created an AI Hardware IP
10/3/2019
In 2019 , the Japanese companies are making headway with their originally designed RISC-V CPUs. DMP, Digital Media Professional, designed an original RISC-V CPU. At DSF2019.
NSI-TEXE developed the world’s first ASIL-D-compliant RISC-V. First RISC-V for Automotive Apps!
10/3/2019
Two first in the world! ASIL-D Compliant RISC-V! The first RISC-V for cars! NSI-TEXE is a 100% subsidiary of Denso. The chip features the vector extension function ISA of RISC-V.
“RISC-V READER” Japanese Translation Going Up in Amazon Best Seller List Again
10/2/2019
“RISC-V READER” was the first RISC-V book translated and published in Japan, translated by Mitsuaki Narita and LaTeX coding done by SHC. Published on 18 October 2018 with the cooperation of Nikkei BP. It was distributed to all participants at RISC-V Day Tokyo 2018 and the number of copies required …
