FOR IMMEDIATE RELEASE “Building a Device ‘ID Card’—From Power-On to Tamper Detection and Remote Proof (Tentative Title)” (RISC-V Day Tokyo 2025 Autumn • Instructor: H. Andrés Lagar-Cavilla, Principal Engineer, Google) Subhead We’ll emphasize how it works rather than the Caliptra name: a 90-minute, plain-language, demo-driven tutorial on proving that servers …

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NVIDIA has made CUDA available for RISC-V CPUs. 1. CUDA and the Host CPU CUDA is a software stack for utilizing NVIDIA GPUs. Previously, the premise was that x86 (Intel/AMD) or Arm (especially NVIDIA Jetson) CPUs served as hosts. The host CPU orchestrates (control, driver execution, and application logic) the …

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📍 White House, September 2025 In a rare gathering that underscored the deep entanglement of politics, technology, and global economics, former President Donald Trump hosted a high-profile dinner with the world’s most powerful tech CEOs. Attendees included Apple’s Tim Cook, Google’s Sundar Pichai, Microsoft’s Satya Nadella, Meta’s Mark Zuckerberg, OpenAI’s …

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We have completed the design for the RISC-V 15th anniversary mug. It will be presented to the first 120 participants who register and who attend the venue on December 4, 2025. We were originally planning a ceramic mug, but have changed the design. Sorry for changing the subject. With the …

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Announcement of “RISC-V DAY TOKYO 2025 AUTUMN” RISC-V Association will hold Japan’s largest RISC-V conference, “RISC-V DAY TOKYO 2025 AUTUMN” as follows. 1. Event Overview Event name: RISC-V DAY TOKYO 2025 AUTUMN Date: Thursday, December 4, 2025 9:00-18:00 (Japan time) Venue: Ito International Hall, Ito International Research Center, University of …

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